$FF90    BIT 7= COCO    1=COCO1 OR 2 0=COCO3
         BIT 6= MMU     1=ENABLED 0=DISABLED
         BIT 5= IRQ     1=ENABLED
         BIT 4= FIRQ    1=ENABLED
         BIT 3= MAP3    1=DRAM at XFEXX constant
         BIT 2= MAP2    1=standard SCS
         BIT 1= MAP1    ROM map
         BIT 0= MPA0    ROM map
                        normally MAP1=1 & MAP0 x for 16K internal
                                                     16K external

$FF91    BIT 7
         BIT 6
         BIT 5= TIMER   0 = 63us / tick 1 = 279ns / tick (based on tests)
         BIT 4
         BIT 3
         BIT 2
         BIT 1
         BIT 0= TASK    MMU Task select

$FF92    IRQ Enable register and flags
         BIT 7 -
         BIT 6 -
         BIT 5 Timer, 12 bit
         BIT 4 HSync
         BIT 3 VSync
         BIT 2 RS-232
         BIT 1 Keyboard
         BIT 0 CART

$FF93    FIRQ Enable register and flags
         BIT 7 -
         BIT 6 -
         BIT 5 Timer, 12 bit
         BIT 4 HSync
         BIT 3 VSync
         BIT 2 RS-232
         BIT 1 Keyboard
         BIT 0 CART

$FF94    Timer MSB
$FF95    Timer LSB

    TIMER: "This is a 12-bit interval timer. When a value is loaded into
    the MSB, the count is automatically begun. The input clock is either
    14 MHz or horizontal sync, as selected by TIMER ($FF91). As the count
    falls through zero, an interrupt is generated (if enabled), and the
    count is automatically reloaded."
    RG. My tests indicate that the fast clock is not 14 MHz but the
    colorburst frequency 3.58 MHz. I have not tested which byte actually
    starts the timer as I always use a single instruction STD $FF94 to start
    the clock.

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